The project states that the unit delivers up to 1 TOPS while targeting 10 mW average power for edge inference. Alongside the architecture, Google released version 1.0 of an open-source IREE/MLIR compiler intended to take models from JAX, PyTorch, and TensorFlow to Coral NPU hardware without requiring developers to write custom assembly. The source also names Synaptics Astra SR200 MCU-series hardware and globally available Coralboard development kits as options for prototyping and deployment. These are project-reported capabilities and targets; the supplied source does not provide independent benchmark validation. Source: https://developers.googleblog.com/unifying-edge-ai-how-coral-npus-open-standard-brings-portable-energy-viable-intelligence-from-model-to-silicon
Unifying Edge AI: How Coral NPU’s open standard brings portable, energy-viable intelligence from model to silicon
In one minute
Google Research has completed an open 32-bit Coral NPU architecture based on RISC-V, adding a Matrix Execution Unit.
What changed: Google announces the Coral NPU’s completed open RISC-V architecture and v1.0 IREE/MLIR compiler, including a 1-TOPS target and hardware deployment options, distinct from its prior LiteRT API release.